MIPS Goes Open Source, Challenges Arm and RISC-V

Wave Computing, which bought the architecture in mid-2018, hopes to accelerate innovation and adoption of MIPS through a new open-source initiative.

MIPS

MIPS has had a long, strange trip over the past few decades, from when the silicon technology was first used by Silicon Graphics in the mid-1980s to build the first multiprocessor server. Since then it has been bought by SGI, which spun it out in the late 1990s when Intel-based servers began to dominate the market.

Imagination Technologies bought MIPS in 2013 and then sold it to Tallwood Capital four years later. In June 2018, Wave Computing, which builds silicon and appliances optimized for artificial intelligence (AI) and machine learning workloads in the data center, bought MIPS Tech.

Throughout its journey, the MIPS instruction set has morphed from a data center silicon technology to one more commonly found in smaller, highly power-efficient embedded systems, such as internet of things (IoT) devices. Wave officials saw MIPS as a tool for expanding its reach beyond the data center and into these fast-growing areas at the edge.

Open-Sourcing the MIPS ISA

Now the company is taking another step with the technology, announcing plans to open source the MIPS instruction set architecture (ISA) to accelerate innovation by making it available to developers, semiconductor companies and universities. According to company officials, through the MIPS Open program, users will get full access to the latest 32- and 64-bit MIPS architecture to develop new system-on-a-chip (SoC) designs.

The move puts Wave and MIPS into tighter competition not only with Arm and its array of chip-making partners but also RISC-V, another open-source effort that since 2010 has been the primary competition for Arm in embedded markets.

“Having spent years in the open source technology movement, I can attest to the hunger for community-driven solutions,” Art Swift, president of Wave’s MIPS IP business and formerly vice chair of the RISC-V Foundation’s marketing committee, said in a statement. “However, until now, there has been a lack of open source access to true industry-standard, patent-protected and silicon-proven RISC architectures. The overwhelmingly positive response we have received thus far from customers on our MIPS Open initiative is an indication of the dramatic, positive impact we believe the program will have on the industry.”

The MIPS Open effort will drive adoption of MIPS worldwide by ensuring the development of a broad range of MIPS-compatible products, officials said, adding that there already are more than 8.5 billion MIPS-based chips that are in thousands of commercial designs. In addition, there also are thousands of developers and more than 100 academic institutions already in the MIPS ecosystem, they said.

More information about MIPS Open—such as the downloadable architecture, licensing details and participation details—will come out this quarter. According to the company, participants will have access to ISA for free, with no licensing or royalty fees. They’ll be licensed under existing worldwide MIPS patents. They’ll have access to not only ISA Release 6, but also SIMD and DSP extensions, multithreading, the microMIPS architecture and MIPS virtualization.

If Wave officials develop the MIPS Open program correctly, it could be a more powerful competitor to Arm than RISC-V, according to Paul Teich, principal analyst at Liftr Cloud Insights. A key to such an open-source program is having a mature instruction set and a robust software development tool chain, Teich told eWEEK. It’s something that both Arm and MIPS have now, and something that RISC-V is working toward.

“For the IoT and embedded developer, you really want a stable tool chain, and Arm has that,” Teich said. “Now they also have that with MIPS. … In the past, RISC-V was seen as the only alternative [to Arm]. But now there’s MIPS.”

Wave will need to ensure that the MIPS Open group protects the instruction set and mandates that participants in the program use the core instruction set in the products they develop, he said. They can add extensions, but keeping the core instruction set in place for all products means that the same applications can run on the various products that will be developed through the program, just as the same software can run on Arm-based products for disparate vendors.

MIPS Open isn’t the first time that someone has tried to open-source the architecture. In 2014, Imagination and several other vendors—including Qualcomm, Cavium and Broadcom—announced the creation of the prpl Foundation to take MIPS open source and drive adoption of the architecture in a range of systems, from IoT devices to servers and networking gear, to compete with Arm, Intel and other chip makers.

According to the group’s website, the prpl Foundation now has more than three dozen members but has evolved into an organization that now is instruction set-neutral.

RISC-V has seen some success. The founders of the silicon technology in 2016 created a business based on RISC-V called SiFive, which is developing its own SoC platforms. In addition, officials with data storage vendor Western Digital in 2017 said the company was moving to the RISC-V architecture, with plans to sell more than 1 billion RISC-V chips within two years. In addition, RISC-V has gotten the backing of such companies as Google, Samsung, Qualcomm and Nvidia.

Arm over the past couple of years has pushed back at RISC-V through various “block maneuvers,” Teich said, such as opening up some of its microcontroller cores and making them royalty-free. In addition, Arm last year put up a short-lived website attacking the RISC-V architecture. However, company officials took it down days later after criticism that it was a cheap shot at the rival and a slap at open source in general.